UMX / Ultrasound systems
Ultrasound development platform.
A modular ultrasound system under development, combining acquisition electronics, FPGA data handling, and embedded Linux on NXP i.MX8M Plus.
Independent project · In developmentFrom acquisition to application.
UMX is being developed as a configurable platform for ultrasound acquisition, processing, and visualisation. The design supports work on custom transmit/receive sequences and imaging methods, with separate acquisition and processing modules.
Current work covers the system architecture, initial UTR schematics, and a custom Linux image built for the i.MX8M Plus reference board.
- Scope
- Electronics, FPGA, and embedded Linux
- Front end
- UTR · 32-channel transmit/receive module
- Processor
- NXP i.MX8M Plus
- Linux platform
- Yocto Project · Custom image and application layer
System architecture
Acquisition
and processing.
The architecture assigns transmit and receive functions to UTR, acquisition timing and data transfer to an FPGA, and application processing to i.MX8M Plus. PCIe connects the FPGA and processor.
The modular design separates the ultrasound channel hardware from the processing platform, allowing each part to be developed and integrated in stages.
Architecture overview · System integration in development
UTR acquisition electronics
Architecture and initial schematicsUTR is the 32-channel ultrasound transmit/receive daughterboard within UMX. Initial schematic work covers the transmit and receive paths, power, clocking, and interfaces to the main platform.
The board is at the initial design stage. Schematic review, PCB layout, manufacture, and prototype testing are the next hardware steps.
Custom embedded Linux
Yocto image built for the reference boardA custom Yocto image has been built for the NXP FRDM i.MX8M Plus development board. It provides the software base for application development and hardware integration within UMX.
The build uses NXP board support with a Docker build environment, a project-specific application layer, and an image recipe that defines the required software.
- Python runtime and application packaging.
- Remote access, package management, and GPIO diagnostic tools.
- Documented image deployment, serial-console access, and board bring-up procedures.
System integration
Planned developmentThe system architecture defines an FPGA-to-processor PCIe link for acquired data and control. The wider programme includes signal processing, visualisation, and host interfaces over USB and Ethernet.
Subsystem validation and full-system integration will bring the electronics and Linux platform together. Ultrasound image processing and embedded inference are later stages of the programme.